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INTEGRATED CIRCUITS
DATA SHEET
TDA8005A Low-power (3 V/5 V) smart card coupler
Preliminary specification File under Integrated Circuits, IC17 1998 Mar 20
Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
FEATURES * Smart card supply (5 and 3 V 5%, 20 mA maximum with controlled rise and fall times) * Smart card clock generation (up to 8 MHz), with two times synchronous frequency doubling * Clock STOP HIGH, clock STOP LOW or 1.25 MHz (from internal oscillator) for cards power-down mode * Specific UART on I/O for automatic direct/inverse convention settings and error management at character level * Automatic activation and deactivation sequences through an independent sequencer * Supports the protocol T = 0 in accordance with ISO 7816 GSM11.11 requirements (Global System for Mobile communication); approved for Final GSM11.11 Test Approval (FTA) * Several analog options are available for different applications: doubler or tripler DC-to-DC converter, card presence, active HIGH or LOW, threshold voltage supervisor, etc. * Overloads and take-off protections * Current limitations in the event of short-circuit * Special circuitry for killing spikes during power-on or off * Supply supervisor * Step-up converter (supply voltage from 2.5 to 6 V) * Power-down and sleep mode for low power consumption * Enhanced ElectroStatic Discharge (ESD) protections on card side (6 kV minimum) ORDERING INFORMATION TYPE NUMBER TDA8005AG TDA8005AH PACKAGE NAME LQFP64 QFP44 DESCRIPTION
TDA8005A
* Control and communication through a standard RS232 full-duplex interface * Optional additional I/O ports for: - keyboard - LEDs - display - etc. * P80CL51 microcontroller core with 4-kbyte ROM and 256-byte RAM. APPLICATIONS * Portable smart card readers for protocol T = 0 * GSM mobile phones. GENERAL DESCRIPTION The TDA8005A is a low-cost card interface for portable smart card readers. Controlled through a standard serial interface, it takes care of all ISO 7816 and GSM11.11 requirements for both 5 and 3 V cards. It gives the card and the set a very high level of security, due to its special hardware against ESD, short-circuiting, power failure, etc. Its integrated step-up converter allows operation within a supply voltage range of 2.5 to 6 V. The very low power consumption in power-down and sleep modes saves battery power. Development tools, application report and support (hardware and software) are available.
VERSION SOT314-2 SOT307-2
plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
QUICK REFERENCE DATA SYMBOL VDD IDD(pd) IDD(sm) PARAMETER supply voltage supply current in power-down mode supply current in sleep mode CONDITIONS doubler and tripler option VDD = 5 V; card inactive card powered but clock stopped; no load doubler option tripler option IDD(om) VCC supply current in operating mode card supply voltage - - 500 700 5.5 MIN. 2.5 -
TDA8005A
TYP. - 100
MAX. 6.0 -
UNIT V A
- - -
A A mA
- unloaded; fXTAL = 13 MHz; fC = 6.5 MHz; fcard = 3.25 MHz 5 V card no load static load dynamic load on 200 nF capacitor 3 V card no load static load dynamic load on 200 nF capacitor 2.9 2.79 2.75 - - 0.04 4.85 4.75 4.5
5.05 5.0 -
5.25 5.25 5.4
V V V
3.03 3 - - - 0.1
3.15 3.21 3.25 20 0.16
V V V mA V/s
ICC SR
card supply current slew rate on VCC (rise and fall)
operating limitation maximum load capacitor 250 nF (including typical 200 nF decoupling)
note 1 mA
tde tact fXTAL Tamb Note
deactivation sequence duration activation sequence duration crystal frequency operating ambient temperature
- - 2 -25
- - - -
225 150 16 +85
s s MHz C
1. See Table 3 for mask options.
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
BLOCK DIAGRAM
handbook, full pagewidth
TDA8005A
V
DDD 100 nF S1
47 nF
47 nF
S2 61 (41)
S3 3 (2)
S4 62 (42)
DDA 2.5 to 6 V 100 nF
V
63 (43)
10 (7)
64 (44)
SUPPLY 44 INTERNAL REFERENCE ref STEP-UP CONVERTER 60 (40) VUP INTERNAL OSCILLATOR 2.5 MHz V DDD S5 47 nF
ALARM
DELAY
46 (31)
VOLTAGE SENSE 2.3 to 2.7 V alarm
RESET
22 (17)
TDA8005AG (TDA8005AH)
VDDD skill start
osc ref 59 (39)
SECURITY
LIS VCC 100 nF
RxD TxD AUX1 AUX2 INT1 P00(1) to P37
28 (18) 29 (19) 32 (22) 33 (23) 30 (20) 4 kbytes ROM 256-byte RAM off EN2 RST BUFFER 56 (36) CONTROLLER CL51 EN1 VCC GENERATOR 58 (38)
RST
RST
OPTIONAL PORTS SEQUENCER EN3 data clk EN R/W S0 S1 INT I/O BUFFER 55 (35) I/O
PERIPHERAL INTERFACE microcontroller clock
EN4
CLOCK BUFFER
57 (37)
CLK
I/O ISO 7816 UART
47 (32)
PRES
CLOCK CIRCUITRY osc 36 (26) 35 (25) 37 (27) 2 (1) 53 K0 DGND Pin numbers in parenthesis represent the TDA8005AH. (1) For details see Chapter "Pinning" and Table 3. AGND
OUTPUT PORT EXTENSION
52 K1
51 K2
50 K3
49 K4
4
MGL330
XTAL1
XTAL2
K5
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
PINNING PIN SYMBOL LQFP64 n.c. AGND S3 K5 P03 P02 P01 n.c. P00 VDDD n.c. TEST1 P11 P12 P13 P14 n.c. P15 P16 TEST2 P17 RESET n.c. n.c. n.c. n.c. n.c. RxD TxD INT1 T0 AUX1 AUX2 P37 XTAL2 XTAL1 DGND n.c. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 QFP44 - 1 2 - 3 4 5 - 6 7 - 8 9 10 11 12 - 13 14 15 16 17 - - - - - 18 19 20 21 22 23 24 25 26 27 - not connected analog ground contact 3 for the step-up converter output port from port extension general purpose I/O port (connected to port P03) general purpose I/O port (connected to port P02) general purpose I/O port (connected to port P01) not connected general purpose I/O port (connected to port P00) digital supply voltage not connected DESCRIPTION
TDA8005A
test pin 1 (connected to port P10; must be left open-circuit in the application) general purpose I/O port or interrupt (connected to port P11) general purpose I/O port or interrupt (connected to port P12) general purpose I/O port or interrupt (connected to port P13) general purpose I/O port or interrupt (connected to port P14) not connected general purpose I/O port or interrupt (connected to port P15) general purpose I/O port or interrupt (connected to port P16) test pin 2 (connected to PSEN; must be left open-circuit in the application) general purpose I/O port or interrupt (connected to port P17) input for resetting the microcontroller (active HIGH) not connected not connected not connected not connected not connected serial interface receive line serial interface transmit line general purpose I/O port or interrupt (connected to port P33) general purpose I/O port (connected to port P34) push-pull auxiliary output (5 mA; connected to timer T1 e.g. port P35) push-pull auxiliary output (5 mA; connected to timer; port P36) general purpose I/O port (connected to port P37) crystal connection crystal connection or external clock input digital ground not connected
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
PIN SYMBOL LQFP64 n.c. P20 P21 P22 P23 ALARM n.c. DELAY PRES TEST3 K4 K3 K2 K1 K0 TEST4 I/O RST CLK VCC LIS S5 S2 S4 VDDA S1 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 QFP44 - 28 - 29 30 - - 31 32 33 - - - - - 34 35 36 37 38 39 40 41 42 43 44 not connected general purpose I/O port (connected to port P20) general purpose I/O port (connected to port P21) general purpose I/O port (connected to port P22) general purpose I/O port (connected to port P23) open-drain output for power-on reset (active HIGH or LOW by mask option) not connected external capacitor connection for delayed reset signal card presence contact input (active HIGH or LOW by mask option) test pin 3 (must be left open-circuit in the application) output port from port extension output port from port extension output port from port extension output port from port extension output port from port extension test pin 4 (must be left open-circuit in the application) data line to/from the card (ISO C7 contact) card reset output (ISO C2 contact) clock output to the card (ISO C3 contact) card supply output voltage (ISO C1 contact) supply for low-impedance on cards contacts contact 5 for the step-up converter contact 2 for the step-up converter contact 4 for the step-up converter analog supply voltage contact 1 for the step-up converter DESCRIPTION
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
59 LIS
60 S5.
64 S1
62 S4
61 S2
55 I/O
53 K0
52 K1
51 K2
50 K3
63 V
58 V
49 K4 48 TEST3 47 PRES 46 DELAY 45 n.c. 44 ALARM 43 P23 42 P22 41 P21 40 P20 39 n.c. 38 n.c. 37 DGND 36 XTAL1 35 XTAL2 34 P37 33 AUX2 AUX1 32
handbook, full pagewidth
n.c. AGND S3 K5 P03 P02 P01 n.c. P00 V DDD n.c. TEST1 P11 P12 P13 P14
1 2 3 4 5 6 7 8
TDA8005AG
9 10 11 12 13 14 15 16 n.c. 27 RxD 28 TxD 29 TEST2 20 RESET 22 INT1 30 n.c. 23 n.c. 24 n.c. 25 P16 19 P17 21 n.c. 17 P15 18 n.c. 26 T0 31
56 RST
57 CLK
54 TEST4
DDA
CC
MGL331
Fig.2 Pin configuration (LQFP64).
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth
AGND S3 P03 P02 P01 P00 V DDD
1 2 3 4 5 6 7 8 9
34 TEST4
43 V DDA
38 V CC
36 RST
37 CLK
39 LIS
35 I/O
44 S1
42 S4
41 S2
40 S5
33 TEST3 32 PRES 31 DELAY 30 P23 29 P22
TDA8005AH
28 P20 27 DGND 26 XTAL1 25 XTAL2 24 P37 23 AUX2
TEST1 P11
P12 10 P13 11 P14 12 P15 13 P16 14 TEST2 15 P17 16 RESET 17 RxD 18 TxD 19 INT1 20 T0 21 AUX1 22
MGL332
Fig.3 Pin configuration (QFP44).
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
FUNCTIONAL DESCRIPTION Microcontroller The microcontroller is a P80CL51 with 256 bytes of RAM instead of 128. The baud rate of the UART has been multiplied by four in modes 1, 2 and 3. This means that the division factor of 32 in the formula is replaced by 8 in both reception and transmission mode and that in the reception modes only four samples per bit are taken with decision on the majority of samples 2, 3 and 4; the delay counter has been reduced from 1536 to 24 as well. Remark: this has an impact when getting out of power-down mode. It is recommended to switch to internal clock before entering power-down mode. All the other functions remain unchanged. Refer to the P80CL51 data sheet for any further information. Internal ports INT0 (P32), P10, P04 to P07 and P24 to P27 are used for controlling the smart card interface. Mode 0 is unchanged. The baud rate for modes 1 and 3 is:
SMOD f clk 2 ---------------- x ---------------------------------------------8 12 x ( 256 - TH1 )
TDA8005A
Supply The circuit operates within a supply voltage range of 2.5 to 6 V. The supply pins are VDDD, VDDA, DGND and AGND. Pins VDDA and AGND supply the analog drivers to the card and have to be externally decoupled because of the large current spikes that the card and the step-up converter can create. An integrated spike killer ensures the contacts to the card remain inactive during power-up or power-down. An internal voltage reference is generated which is used within the step-up converter, the voltage supervisor and the VCC generator. The voltage supervisor generates an internal alarm pulse, whose length is defined by an external capacitor tied to the DELAY pin, when VDDD is too low to ensure proper operation (1 ms per 1 nF typical). This pulse is used as a reset pulse by the controller, in parallel with an external reset input, which can be tied to the system controller. It is also used in order to either block any spurious card contacts during controllers reset, or to force an automatic deactivation of the contacts in the event of supply dropout; see Sections "Activation sequence" and "Deactivation sequence". In the 64 pin version, this reset pulse is output to the open drain ALARM pin, which may be selected active HIGH or active LOW by mask option and may be used as a reset pulse for other devices within the application.
The baud rate for mode 2 is: 2 ---------------- x f clk 16 For mode 3 timing see Table 1. Table 1 BAUD RATE 135416 67708 45139 33854 27083 22569 16927 13542 11285 Mode 3 timing fclk = 6.5 MHz; VDD = 5 V SMOD 1 0 1 0 1 0 - - 0 TH1 255 255 253 254 251 253 - - 250 fclk = 3.25 MHz; VDD = 5 or 3 V SMOD - 1 - 0 - 1 0 1 0 TH1 - 255 - 255 - 253 254 251 253
SMOD
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth
Vth(VDD) + Vhys(VthVDD) Vth(VDD) VDD
Vth(DELAY) VDELAY
ALARM
MGL333
Fig.4 Supply supervisor.
Low impedance supply (pin LIS) For some applications, it is mandatory that the contacts to the card (VCC, RST, CLK and I/O) are low impedance while the card is inactive and also when the coupler is not powered. An auxiliary supply voltage on pin LIS ensures this condition where ILIS 5 A for VLIS = 5 V. This low impedance situation is disabled when VCC starts rising during activation, and re-enabled when the step-up converter is stopped during deactivation. If this feature is not required, the LIS pin must be tied to VDDD. Step-up converter Except for the VCC generator and the other cards contacts buffers, the whole circuit is powered by VDDD and VDDA. If the supply voltage is 3 or 5 V, then a higher voltage is needed for the ISO contacts supply. When a card session is requested by the controller, the sequencer first starts the step-up converter, which is a switched capacitors type, clocked by an internal oscillator at a frequency of approximately 2.5 MHz. The output voltage Vstep-up is regulated at approximately 6.5 V and then fed to the VCC generator. VCC and DGND are used as a reference for all other cards contacts.
The step-up converter may be chosen as a doubler or a tripler by mask option, depending on the voltage and the current needed on the card. ISO 7816 security The correct sequence during activation and deactivation of the card is ensured through a specific sequencer, clocked by a division ratio of the internal oscillator. Activation (START signal P05; see Table 3) is only possible if the card is present (PRES HIGH or LOW according to mask option), and if the supply voltage is correct (ALARM signal inactive); CLK and RST are controlled by RSTIN (internal signal; port P04), allowing the correct count of CLK pulses during answer-to-reset from the card. The presence of the card is signalled to the controller by the OFF signal (port P10; see Table 3). During a session, the sequencer performs an automatic emergency deactivation in the event of card take-off, supply voltage drop, or hardware problems. The OFF signal falls thereby warning the controller.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
Clock circuitry The clock to the microcontroller and the clock to the card are derived from the main clock signal (XTAL from 2 to 16 MHz, or an external clock signal). Directly after reset and during power reduction modes the microcontroller clock frequency fclk equals 18fINT; fINT is always present because it is derived from the internal oscillator and gives the lowest power consumption. When required (for card session, serial communication or anything else) the microcontroller may choose to clock itself with 12fXTAL, 14fXTAL or 12fINT. All frequency changes are synchronous, thereby ensuring no hang-up due to short spikes etc. Cards clock: the microcontroller may select to send the card a card clock frequency of 12fXTAL, 14fXTAL, 18fXTAL or 1 f 2 INT (1.25 MHz), or to stop the clock HIGH or LOW. All transitions are synchronous, ensuring correct pulse length during start or change in accordance with ISO 7816.
1
TDA8005A
active. The card is not active; this is the smallest power consumption mode. Any change on P1 ports or on PRES will wake-up the circuit (for example, a key pressed on the keyboard, the card inserted or taken off). In the sleep mode, the card is powered but configured in the idle or sleep mode. The step-up converter will only be active when it is necessary to reactivate Vstep-up. When the microcontroller is in power-down mode any change on P1 ports or on PRES will wake up the circuit. In both power reduction modes the sequencer is active, allowing automatic emergency deactivation in the event of card take-off, hardware problems, or supply dropout. The TDA8005A is set into power-down or sleep mode by software. There are several ways to return to normal mode: insertion or extraction of the card, detection of a change on P1 (which can be a key pressed) or a command from the system microcontroller. For example, if the system monitors the clock signal on XTAL1, it may stop this clock after setting the device into power-down mode and then wake it up when sending the clock signal again. In this situation, the internal clock should have been used before the fclk. Peripheral interface This block allows synchronous serial communication with the three peripherals (ISO 7816 UART, clock circuitry and output port extension); see Figs 1 and 5.
After power on, CLK is set at STOP LOW and fclk is set at 8fINT.
Power-down and sleep modes The TDA8005A offers a large flexibility for defining power reduction modes by software. Some configurations are described below. In the power-down mode, the microcontroller is in power-down and the supply and the internal oscillator are
handbook, full pagewidth
RESET
P24 DATA
P07 P06 STROBE ENABLE
P27 REG0
P26 REG1
P25 R/W
P32 INT
PERIPHERAL CONTROL
clock configuration CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7 UART configuration UC0 UC1 UC2 UC3 UC4 UC5 UC6 UC7 UART transmit UT0 UT1 UT2 UT3 UT4 UT5 UT6 UT7 ports extension PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7
UART receive UR0 UR1 UR2 UR3 UR4 UR5 UR6 UR7 UART status register US0 US1 US2 US3 US4 US5 US6 US7
MGL334
Fig.5 Peripheral interface diagram.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
Table 2 Explanation of Fig.5; note 1 DESCRIPTION
TDA8005A
BIT NAME
REG0 = 0, REG1 = 0 and R/W = 0; CLOCK configuration register (configuration after reset is cards clock STOP LOW, fclk = 18fINT) CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7 cards clock = 12fXTAL cards clock = 14fXTAL cards clock = 18fXTAL cards clock = 12fINT cards clock = STOP HIGH fclk = 12fXTAL fclk = 14fXTAL fclk = 12fINT ISO UART RESET START SESSION LCT (Last Character to Transmit) TRANSMIT/RECEIVE 3 V/5 V not used
REG0 = 1, REG1 = 0 and R/W = 0; UART configuration register (after reset all bits are cleared) UC0 UC1 UC2 UC3 UC4 UC5 to UC7
REG0 = 0, REG1 = 1 and R/W = 0; UART transmit register UT0 to UT7 LSB to MSB of the character to be transmitted to the card
REG0 = 1, REG1 = 1 and R/W = 0; PORTS EXTENSION (after reset all bits are cleared) PE0 to PE5 PE0 to PE5 is the inverse of the value to be written on K0 to K5 PE6 and PE7 not used REG0 = 0, REG1 = 0 and R/W = 1; UART receive register UR0 to UR7 LSB to MSB of the character received from the card
REG0 = 1, REG1 = 0 and R/W = 1; UART status register (after reset all bits are cleared) US0 US1 US2 US3 US4 US5 to US7 Note 1. All registers are active HIGH. UART transmit buffer empty UART receive buffer full first start bit detected parity error detected during reception of a character (the UART has asked the card to repeat the character) parity error detected during transmission of a character; the controller must write the previous character in the UART transmit register, or abort the session not used
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
USE OF PERIPHERAL INTERFACE
TDA8005A
Write operation
1. Select the correct register with R/W, REG0 and REG1 2. Write the word in the Peripheral Shift Register (PSR) with DATA and STROBE; DATA is shifted on the rising edge of STROBE; 8 shifts are necessary 3. Give a negative pulse on ENABLE; the data is parallel loaded in the register on the falling edge of ENABLE.
Read operation
1. Select the correct register with R/W, REG0 and REG1 2. Give a first negative pulse on ENABLE; the word is parallel loaded in the peripheral shift register on the rising edge of ENABLE 3. Give a second negative pulse on ENABLE for configuring the PSR in shift right mode 4. Read the word from PSR with DATA and STROBE; DATA is shifted on the rising edge of STROBE; 7 shifts are necessary. EXAMPLE OF PERIPHERAL INTERFACE ;**************************************** ;*CHANGE OF CLOCK CONFIGURATION REGISTER* ;**************************************** ; ;**THE NEW CONFIGURATION IS SUPPOSED** ;**TO BE IN THE ACCUMULATOR** CLR REG0 CLR REG1 CLR R/W MOV R2,#8 LOOP RRC A MOV DATA C CLR STROBE SET STROBE DJNZ R2,LOOP CLR ENABLE SET ENABLE SET DATA RET
;**************************************** ;*READ CHARACTER ARRIVED IN UART RECEIVE* ;*****************REGISTER*************** ;**************************************** ; ;**THE CHARACTER WILL BE IN THE** ;**ACCUMULATOR** CLR REG0 CLR REG1 SET R/W CLR ENABLE SET ENABLE CLR ENABLE SET ENABLE MOV R2,#8 LOOP MOV C,DATA RRC A CLR STROBE SET STROBE DJNZ R2,LOOP SET DATA RET ISO UART The ISO UART handles all the specific requirements defined in ISO T = 0 protocol type. It is clocked with the cards clock, which gives the fclk/31 sampling rate for start bit detection (the start bit is detected at the first LOW level on I/O) and the fclk/372 frequency for Elementary Time Unit (ETU) timing (in the reception mode the bit is sampled at 1 ETU). It also allows the cards clock frequency changes 2 without interfering with the baud rate. This hardware UART allows operating of the microcontroller at low frequency, thus lowering EM radiations and power consumption. It also frees the microcontroller of fastidious conversions and real time jobs thereby allowing the control of higher level tasks. The following occurs in the reception mode (see Fig.6): * Detection of the inverse or direct convention at the beginning of Answer To Reset (ATR) * Automatic convention setting, so the microcontroller only receives characters in direct convention * Parity checking and automatic request for character repetition in case of error (reception is possible at 12 ETU).
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
The following occurs in the transmission mode (see Fig.7): * Transmission according to the convention detected during ATR, consequently the microcontroller only has to send characters in direct convention; transmission of the next character may start at 12 ETU in the event of no error or 13 ETU in case of error * Parity calculation and detection of repetition request from the card in the event of error * The bit LCT (Last Character to Transmit) allows fast reconfiguration for receiving the answer 12 ETU after the start bit of the last transmitted character. The ISO UART status register can inform which event has caused an interrupt (buffer full, buffer empty, parity error detected etc.) in accordance with peripheral interface. The register is reset when its status is read by the microcontroller. The ISO UART configuration register enables the microcontroller to configure the ISO UART and to choose between 5 or 3 V cards. Bit UC4 (3 V/5 V) LOW means 5 V card, bit UC4 (3 V/5 V) HIGH means 3 V card; conform peripheral interface. The selection of 3 or 5 V card has to be done before activation. After power-on, all ISO UART registers are reset. The ISO UART is configured in the reception mode. When the microcontroller wants to start a session, it sets the bits UC1 (START SESSION) and UC0 (ISO UART RESET) in the UART configuration register and then sets bit START SESSION LOW. When the first start bit on I/O is detected (sampling rate fclk/31), the UART sets the bit US2 (first start bit detected) in the status register which gives an interrupt on internal port INT0 one clock pulse later.
TDA8005A
The convention is recognized on the first character of the ATR and the UART configures itself in order to exchange direct data without parity processing with the microcontroller whatever the convention of the card is. Bit UC1 (START SESSION) must be reset by software. At the end of every character, the UART tests the parity and resets what is necessary for receiving another character. If no parity error is detected, the UART sets bit US1 (UART receive buffer full) in the status register which warns the microcontroller it has to read the character before the reception of the next one has been completed. The status register is reset when read from the controller. If a parity error has been detected, the UART pulls the I/O line LOW between 10.5 and 12 ETU. It also sets the bits US1 (UART receive buffer full) and US3 (parity error detected during reception of a character) in the status register which warns the microcontroller that an error has occurred. The card is supposed to repeat the previous character.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth = 0 or LCT = 1 START; T/R
START;
and T/R = 0
SET ENABLE FSD(1) clock starts INHIBIT I/O DURING 200 CLK
SAMPLE I/O EVERY 31 CLK y
I/O = 0 n
SET FSD STATUS REGISTER IF FSD IS ENABLED RESET EN FSD
5th bit SAMPLE I/O AT 186 AND EVERY 372 CLK 10th bit CONVERT AND LOAD CHARACTER IN RECEPTION BUFFER AT 10 ETU SET CONVENTION IF START SESSION = 1
(2)
parity error CHECK PARITY DISABLE I/O BUFFER BETWEEN 10 AND 12 ETU
SET BIT RECEPTION PARITY ERROR AT 10 ETU PULL I/O LINE LOW FROM 10.5 TO 11.75 ETU
MGL335
SET BIT BUFFER FULL AT 10 ETU RESET RECEPTION PART AT 12 ETU
(3)
STOP; T/R = 1
(1) FSD = First Start Detect. (2) The start session is reset by software. (3) The software may load the received character in the peripheral control at any time without any action on the ISO UART.
Fig.6 ISO UART reception flow chart.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
When the controller needs to transmit data to the card, it first sets bit UC3 in the UART configuration register which configures the UART in the transmission mode. As soon as a character has been written in the UART transmit register, the UART makes the conversion, calculates the parity and starts the transmission on the rising edge of ENABLE. When the character has been transmitted, it surveys the I/O line at 11 ETU in order to know if an error has been detected by the card. If no error has occurred, the UART sets bit US0 (UART transmit buffer empty) in the status register and waits for the next character. If the next character has been written before 12 ETU, the transmission will start at 12 ETU. If it was written after 12 ETU it will start on the rising edge of ENABLE. If an error has occurred, it sets bits US0 and US4 (parity error detected during transmission of a character) which warns the microcontroller to rewrite the previous character in the UART transmit register.
TDA8005A
If the character has been rewritten before 13 ETU, the transmission will start at 13 ETU. If it has been written after 13 ETU it will start on the rising edge of ENABLE. When the transmission is completed, the microcontroller may set bit LCT (Last Character to Transmit) so that the UART will force the reception mode into ready to get the reply from the card at 12 ETU. This bit must be reset before the end of the first reception. Bit UC3 (TRANSMIT/RECEIVE) must be reset to enable the reception of the characters to follow. When the session is completed, the microcontroller re-initializes the whole UART by resetting bit UC0 (ISO UART RESET).
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth
START; T/R
SET TRANSMIT ENABLE transmit register selected CONVERT, CALCULATE PARITY AND LOAD IN TRANSMIT SHIFT REGISTER
(1)
SHIFT EVERY ETU IF TRANSMIT ENABLE IS SET 10th bit shifted SET I/O BUFFER IN RECEPTION AT 10 ETU
SAMPLE I/O AT 11 ETU
parity error n
y
SET BIT TRANSMISSION PARITY ERROR AND BUFFER EMPTY AT 11 ETU
SET BIT BUFFER EMPTY AT 11 ETU y LCT = 1 n RESET TRANSMIT PART AT 11 ETU FORCE RECEPTION MODE RESET TRANSMIT PART AND ENABLE TRANSMIT AT 12 ETU n
(2)
RESET TRANSMIT PART AND ENABLE TRANSMIT AT 13 ETU
T/R = 0 y STOP STOP
MGL336
(1) The transmit register may be loaded just after reading from the status register. (2) The software must reset the last character but before completion of the first received character.
Fig.7 ISO UART transmission flow chart.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
I/O buffer modes (see Fig.8) The I/O buffer modes are: * I/O buffer disabled * I/O buffer in input, 20 k pull-up resistor connected between I/O and VCC, I/O masked till 200 clock pulses * I/O buffer in input, 20 k pull-up resistor connected between I/O and VCC, I/O is sampled every 31 clock pulses * I/O buffer in output, 20 k pull-up resistor connected between I/O and VCC * I/O buffer in output, I/O is pulled LOW by the N transistor of the buffer * I/O buffer in output, I/O is pulled HIGH or LOW by the P or N transistor. Output ports extension In the LQFP64 version, 6 auxiliary output ports may be used for low frequency tasks (for example, keyboard scanning). These ports are push-pull output types (in accordance with use in software document). Activation sequence When the card is inactive, VCC, CLK, RST and I/O are LOW, with low impedance with respect to GND. The step-up converter is stopped. The I/O is configured in the reception mode with a high impedance path to the ISO UART, subsequently no spurious pulse from the card during power-up will be taken into account until I/O is enabled. When conditions are fulfilled (supply voltage present, card present, no hardware problems), the microcontroller may initiate an activation sequence by setting START LOW (t0; see Fig.9): 1. The step-up converter is started (t1) 2. LIS signal is disabled by internal signal ENLI, and VCC starts rising from 0 to 5 or 3 V (according to bit 4 of UART configuration register) with a controlled rise time of 0.1 V/s typically (t2) 3. I/O buffer is enabled (t3) 4. Clock is sent to the card (t4) 5. RST buffer is enabled (t5).
TDA8005A
In order to allow a precise count of clock pulses during ATR, a defined time window (t3; t5) is opened where the clock may be sent to the card by means of RSTIN (port P04). Beyond this window, RSTIN has no more action on clock, and only monitors the cards RST contact (RST is the inverse of RSTIN). The sequencer is clocked by fINT/64 which leads to a time interval T of 25 s typical. Thus t1 = 0 to 164T, t2 = t1 + 32T, t3 = t1 + 4T, t4 = t3 to t5 and t5 = t1 + 7T. Deactivation sequence When the session is completed, the microcontroller sets START HIGH. The circuit then executes an automatic deactivation sequence (see Fig.10): 1. Card reset (RST falls LOW) at t10 2. Clock is stopped at t11 3. I/O becomes high impedance to the ISO UART (t12) 4. VCC falls to 0 V with typical 0.1 V/s slew rate (t13) 5. The step-up converter is stopped and CLK; RST, VCC and I/O become low impedance to GND (t14) 6. t10 < 164T; t11 = t10 + 12T; t12 = t10 + T; t13 = t10 + 32T; t14 = t10 + 5T. Protections Main hardware fault conditions are monitored by the circuit: * Overcurrent on VCC (in accordance with options as specified in Table 3) * Short circuits between VCC and other contacts * Card take-off during transaction. When one of these problems is detected, the security logic block pulls the interrupt line (port P10) OFF LOW, in order to warn the microcontroller and initiates an automatic deactivation of the contacts. When the deactivation has been completed, the OFF line returns HIGH, except if the problem was due to a card extraction in which case it remains LOW until a card is inserted.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth
activation
character reception with error
character reception without error
character transmission with error
character transmission without error
character reception without error
forced deactivation
I/O
OUT I/O BUFFER IN ISO UART MODE T R 1 2 3 4 54 3 4 1 6 3 6 3 3 4 3 1
MBH638
Fig.8 I/O buffer modes.
handbook, full pagewidth
PRES OFF START fINT/64 Vstep-up VCC I/O ENRST RSTIN CLK RST ENLI internal
MGL337
internal
t3
tact
Fig.9 Activation sequence.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
handbook, full pagewidth
PRES OFF START fINT/64 RST CLK I/O VCC Vstep-up ENLI t10 internal t11 t12 t13 tde t14
MGL338
Fig.10 Emergency deactivation sequence after a card take-off.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDDA VDDD Vn In1 PARAMETER analog supply voltage digital supply voltage all input voltages DC current into pins XTAL1, XTAL2, RxD, TxD, RESET, INT1, T0 (port P34), P37, P00 to P03, P11 to P17, P20 to P23 and TEST1 to TEST4 DC current from or to pins AUX1 and AUX2 DC current from or to pins S1 to S5 DC current into pin DELAY DC current from or to pin PRES DC current from and to pins K0 to K5 DC current from or into pin ALARM (according to option choice) total power dissipation storage temperature electrostatic discharge on pins I/O, VCC, RST, CLK and PRES on other pins Tj HANDLING junction temperature - Tamb = -25 to +85C CONDITIONS MIN. -0.3 -0.3 -0.3 -
TDA8005A
MAX. +6.5 +6.5 5 V V
UNIT
VDD + 0.5 V mA
In2 In3 In4 In5 In6 In7 Ptot Tstg Vesd
-10 -30 -5 -5 -5 -5 - -55 -6 -2 -
+10 +30 +10 +5 +5 +5 500 +150 +6 +2 125
mA mA mA mA mA mA mW C kV kV C
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) LQFP64 QFP44 PARAMETER CONDITIONS VALUE 70 60 UNIT K/W K/W
thermal resistance from junction to ambient in free air
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
CHARACTERISTICS VDD = 5 V; VSS = 0 V; Tamb = 25 C; for general purpose I/O ports refer to P80CL51 data sheet; unless otherwise specified. SYMBOL Supply VDD IDD(pd) IDD(sm) supply voltage supply current in power-down mode supply current in sleep mode voltage superior, option dependant; note 1 2.5 - 100 6.0 - V A PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDD = 5 or 3 V; card inactive - card powered but clock stopped; no load doubler option tripler option - - -
500 700 5.5
- - -
A A mA
IDD(om)
supply current operating mode
unloaded; fXTAL = 13 MHz; fclk = 6.5 MHz; fcard = 3.25 MHz VDD = 3 V; fXTAL = 13 MHz; fclk = 3.25 MHz; fcard = 3.25 MHz
-
3
-
mA
Vth(VDD)
threshold voltage on VDD (falling)
supervisor option
2 2.45 3.8 40 -
- - - - 1.38
2.3 3 4.5 350 - VDD -0.4 10 -
V V V mV V V A mA ms A V A V
Vhys(VthVDD) hysteresis on Vth(VDD) Vth(DELAY) VDELAY IDELAY tW IOH VOL IOL VOH threshold voltage on pin DELAY voltage on pin DELAY output current at pin DELAY ALARM pulse width pin grounded (charge) VDELAY = VDD (discharge) CDELAY = 10 nF active LOW option; VOH = 5 V active LOW option; IOL = 2 mA active HIGH option; VOL = 0 V active HIGH option; IOH = -2 mA ALARM (open drain active HIGH or LOW output) HIGH-level output current LOW-level output voltage LOW-level output current HIGH-level output voltage
VDD - 0.5 - -1.5 4 - - - - VDD - 1 -1 6.8 10 - - - -
10 0.4 -10 -
Crystal oscillator; note 2 fXTAL fext crystal frequency frequency of external signal applied on pin XTAL1 2 0 - - 16 16 MHz MHz
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
SYMBOL Step-up converter fINT Vstep-up
PARAMETER
CONDITIONS
MIN. - 6.5 4.5 - - - - - - - - - - - - - - - - - - -
TYP.
MAX.
UNIT
internal oscillation frequency voltage on pin S5 5 V card 3 V card
2 - -
3 - -
MHz V V
Low impedance supply (pin LIS) VLIS ILIS Vo(RST) Io(RST) VOL VOH voltage on pin LIS current at pin LIS 0 - -0.3 - -0.25 4 2.4 - - -0.3 - -0.25 - - 1 - - - 45 VDD 7 V A
Reset output to the card (pin RST) output voltage output current LOW-level output voltage HIGH-level output voltage when inactive or when LIS is used; Io(RST) = 1 mA when inactive and pin grounded IOL = 200 A IOH -200 A 5 V card 3 V card tr tf Vo(CLK) Io(CLK) VOL VOH tr tf fclk rise time fall time CL = 30 pF CL = 30 pF when inactive or when LIS is used; Io(CLK) = 1 mA when inactive and pin grounded IOL = 200 A IOH -200 A CL = 30 pF CL = 30 pF 1 MHz idle configuration low operating speed middle operating speed high operating speed duty cycle CL = 30 pF VCC + 0.3 VCC + 0.3 1 1 V V s s +0.4 -1 +0.4 V mA V
Clock output to the card (pin CLK) output voltage output current LOW-level output voltage HIGH-level output voltage rise time fall time clock frequency +0.4 -1 +0.4 15 15 1.5 2 4 8 55 V mA V ns ns MHz MHz MHz MHz %
VCC - 0.5 -
VCC + 0.25 V
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Card supply voltage (pin VCC) Vo(VCC) card supply output voltage when inactive and when LIS -0.3 is used; Io(VCC) = 1 mA when active; 5 V card no load static load dynamic loads on 200 nF capacitor when active; 3 V card no load static load dynamic loads on 200 nF capacitor Io(VCC) card supply output current when inactive and pin grounded when active limited SR slew rate on VCC (rise and fall) maximum load capacitor 250 nF (including typical 200 nF decoupling) 2.9 2.79 2.75 - - - 0.04 3.03 3 - - - - 0.1 3.15 3.21 3.25 -1 20 note 1 0.16 V V V mA mA mA V/s 4.85 4.75 4.5 5.05 5.0 - 5.25 5.25 5.4 V V V - +0.4 V
Data line (pin I/O) Vo(I/O) Io(I/O) VOL VOH VIL VIH tr tf Protections ICC(sd) shutdown current at pin VCC - 00/30/60; note 1 - mA output voltage output current LOW-level output voltage HIGH-level output voltage LOW-level input voltage HIGH-level input voltage rise time fall time when inactive or when LIS is used; Io(I/O) = 1 mA when inactive and pin grounded I/O configured as output; IOL = 1 mA I/O configured as output; IOH 100 A I/O configured as input; IIL = 1 mA I/O configured as input; IIL = 100 A CL = 30 pF CL = 30 pF -0.3 - -0.25 0.8VCC 0 0.6VCC - - - - - - - - - - +0.4 -1 +0.3 V mA V
VCC + 0.25 V 0.5 VCC 1 1 V V s s
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
SYMBOL Timing tact tde t3(start) t5(end)
PARAMETER
CONDITIONS - - -
MIN. - - - -
TYP.
MAX.
UNIT s s s s
activation sequence duration deactivation sequence duration start of the window for sending clock to the card end of the window for sending clock to the card
225 150 130 -
140
Auxiliary outputs (AUX1 and AUX2) VOL VOH VOL VOH VIL VIH IIH Notes 1. See Table 3 for mask options. 2. The crystal oscillator is the same as option 3 of the P80CL51. LOW-level output voltage HIGH-level output voltage IOL = 5 mA IOH = -5 mA IOL = 2 mA IOH = -2 mA IIL = -1 mA IIH = 100 A VIH = 5 V - VDD - 1 - VDD - 1 - 0.7VDD 0.2 - - - - - - - 0.4 - V V
Output ports from extension (K0 to K5) LOW-level output voltage HIGH-level output voltage 0.4 - V V
Card presence input (pin PRES) LOW-level input voltage HIGH-level input voltage HIGH-level input current 0.6 - 3 V V A
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from system controller RESET RX TX MMI-EN 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 LED2 R7 +5 V (logic) LED1 1.5 1.5 R8 4.7 nF
APPLICATION INFORMATION
Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
KEYBOARD
5V (analog) 100 nF +5 V (analog) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 100 nF 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
4.7 nF
100 nF
47 nF
TDA8005AG
NC8 NC7 NC6 NC5 C1 C2 C3 C4
NC1 NC2 NC3 NC4 C5 C6 C7 C8
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
MMI-CLK MMI-REQ LIS
Fig.11 Possible GSM application.
handbook, full pagewidth
26
K1 K2 +5 V (logic) 100 k
CARD READ UNIT C702
MGL339
Preliminary specification
TDA8005A
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handbook, full pagewidth
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 LED1 R6
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
VDD
LED2
R7
33 pF
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1998 Mar 20 27
AS R/W E
Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
KEYBOARD
VDD
100 nF
47 nF
3V 100 nF 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
47 nF 100 nF 47 nF
TDA8005AG
C8 C7 C6 C5 NC1 NC2 NC3 NC4
C4 C3 C2 C1 NC5 NC6 NC7 NC8
K1 K2
CARD READ UNIT LM01
MGL340
4.7 nF 7.15 MHz 33 pF
Preliminary specification
TDA8005A
D7 D6 D5 D4
DISPLAY DRIVER AND DISPLAY
D3 D2 D1 D8
Fig.12 Possible stand-alone application.
Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
Mask options Table 3 TDA8005A option choice form DESCRIPTION OPTION 1 2 3 S RSTIN START STROBE ENABLE OFF 3S 3S 3S 3S 2S R Note Table 4
TDA8005A
Description of used options; note 1 DESCRIPTION standard I/O open-drain I/O push-pull output set to HIGH state set to LOW state
FUNCTION P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17 P20 P21 P22 P23 P24 P25 P26 P27 P30 P31 P32 P33 P34 P35 P36 P37 AUX1 AUX2 INT DATA R/W
OPTION
1. Example: option 1 S indicates standard I/O, set to HIGH state at power-on.
1S 3S 3S 3S
REG1 REG0
1S
3S 3S
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
Table 5 Analog options OPTIONS doubler 2.3 V low 10 k 0 0 active HIGH active HIGH no limitation tripler 3V high impedance 20 k 100 80 active LOW active LOW 30 mA limitation 60 mA limitation 30 k 150 130 4.5 V
TDA8005A
FEATURES Step-up Supervisor I/O I/O pull-up R-CLK R-RST ALARM PRES IC protection
200 180
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
PACKAGE OUTLINES LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm
TDA8005A
SOT314-2
c
y X A 48 49 33 32 ZE
e E HE wM bp 64 1 pin 1 index 16 ZD bp D HD wM B vM B vM A 17 detail X L Lp A A2 A1 (A 3)
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.60 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 10.1 9.9 E (1) 10.1 9.9 e 0.5 HD HE L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 1.45 1.05 1.45 1.05 7 0o
o
12.15 12.15 11.85 11.85
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT314-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-12-19 97-08-01
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
TDA8005A
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SOT307-2
c
y X
A 33 34 23 22 ZE
e E HE wM bp pin 1 index 44 1 bp D HD wM 11 ZD B vM B vMA 12 detail X A A2 (A 3) Lp L
A1
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.10 A1 0.25 0.05 A2 1.85 1.65 A3 0.25 bp 0.40 0.20 c 0.25 0.14 D (1) 10.1 9.9 E (1) 10.1 9.9 e 0.8 HD 12.9 12.3 HE 12.9 12.3 L 1.3 Lp 0.95 0.55 v 0.15 w 0.15 y 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 10 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT307-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all LQFP and QFP packages. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our "Quality Reference Handbook" (order code 9397 750 00192). Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. Wave soldering Wave soldering is not recommended for LQFP and QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP and QFP packages with a pitch (e) equal or less than 0.5 mm.
TDA8005A
If wave soldering cannot be avoided, for LQFP and QFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8005A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
NOTES
TDA8005A
1998 Mar 20
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Philips Semiconductors
Preliminary specification
Low-power (3 V/5 V) smart card coupler
NOTES
TDA8005A
1998 Mar 20
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Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
Internet: http://www.semiconductors.philips.com
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
435102/1200/01/pp36
Date of release: 1998 Mar 20
Document order number:
9397 750 02512

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